My Projects

A collection of my technical projects, from hardware design to full-stack software.

• 

  Personal Portfolio Website

  In-Progress

  The very website you are on. A personal portfolio built with Astro to showcase my projects and resume.

• TinyRISC-V RV1 Processor

  Completed

  A single-cycle 32-bit RISC-V processor (RV1) in Verilog, supporting a subset of the RISC-V ISA.

• 

  FPGA-Based Gaussian Blur Image Processing

  Completed

  Engineered a Gaussian blur filter on a Cyclone V SOC FPGA using Verilog, processing a 160x120 image through a 3x3 kernel.